A 0.9-V 28-MHz Highly Digital CMOS Dual-RC Frequency Reference With ±200 ppm Inaccuracy From −40 °C to 85 °C

This article presents an energy-efficient dual- $RC$ frequency reference intended for wireless sensor nodes. It consists of a digital frequency-locked loop (FLL) in which the digitally controlled oscillator (DCO) is locked to temperature-independent phase shift derived from two different poly-phase filters (PPFs). Phase shifts with complementary temperature coefficients (TCs) are generated by using PPFs made resistor types (p-poly and silicided p-poly). The each filter determined zero-crossing (ZC) detector then digitized phase-domain notation="LaTeX">$\Delta \Sigma $ modulator ( notation="LaTeX">$\Phi - \text{M}$ ). results combined domain via fixed polynomials produce shift. highly architecture enables use sub-1-V supply voltage enhances energy area efficiency. 28-MHz occupies 0.06 mm 2 65-nm CMOS process. achieves period jitter 7 ps notation="LaTeX">$1\sigma ) draws notation="LaTeX">$142~\mu \text{W}$ 0.9-V supply, corresponds consumption 5 pJ/cycle. Furthermore, it ±200 ppm inaccuracy notation="LaTeX">$- 40\,\,^\circ \text{C}$ notation="LaTeX">$85~^\circ after two-point trim.